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Cache Protocols

• Cache = fast buffer memory.
• Holds recently accessed data.
• Organized in lines of n memory words.

  e.g. 8192 lines * 4 words * 4 bytes.

Read access:

• Cache hit: word is read from cache.
• Cache miss: bus transfer takes place.
  1. Cache line read from memory.
  2. Replaces some (e.g. least recently used) line.

Write access:

• Problem: problem cache consistency.
• Processor modifies content of cache line.
• Other processors hold invalid copies.