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Symmetrical Multiprocessing
Example
Sequent Symmetry S81
melmac.risc.uni-linz.ac.at
20 processors 80386/80387 @ 20MHz
128 MB memory
80 MB/s bus transfer rate.
Each processor
approx.
5 MIPS
*
1 word
approx.
20 MB/s maximum bus load per processor.
128 KB cache per processor
Author:
Wolfgang Schreiner
Last modification: November 15, 1996